//==============================================================================
// Copyright (c) 2010-2020 Advanced Micro Devices, Inc. All rights reserved.
/// \author AMD Developer Tools Team
/// \file
/// \brief  DX12 counter definitions for GFX10
//==============================================================================

#include "gpa_counter.h"
#include "gpa_hw_counter_gfx10.h"
#include "gpa_hw_exposed_counters_gfx10.h"
#include "gpa_hw_counter_dx12_gfx10.h"

// This file is autogenerated by the ConvertHWEnums project

namespace countergfx10
{
    GPA_HardwareCounterDesc* dx12_counter_group_array_gfx10[] = {
        cpf_counters_gfx10,
        pa_su0_counters_gfx10,
        pa_su1_counters_gfx10,
        pa_su2_counters_gfx10,
        pa_su3_counters_gfx10,
        pa_su4_counters_gfx10,
        pa_su5_counters_gfx10,
        pa_su6_counters_gfx10,
        pa_su7_counters_gfx10,
        pa_sc0_counters_gfx10,
        pa_sc1_counters_gfx10,
        pa_sc2_counters_gfx10,
        pa_sc3_counters_gfx10,
        pa_sc4_counters_gfx10,
        pa_sc5_counters_gfx10,
        pa_sc6_counters_gfx10,
        pa_sc7_counters_gfx10,
        pa_sc8_counters_gfx10,
        pa_sc9_counters_gfx10,
        pa_sc10_counters_gfx10,
        pa_sc11_counters_gfx10,
        pa_sc12_counters_gfx10,
        pa_sc13_counters_gfx10,
        pa_sc14_counters_gfx10,
        pa_sc15_counters_gfx10,
        spi0_counters_gfx10,
        spi1_counters_gfx10,
        spi2_counters_gfx10,
        spi3_counters_gfx10,
        sq0_counters_gfx10,
        sq1_counters_gfx10,
        sq2_counters_gfx10,
        sq3_counters_gfx10,
        sq_es0_counters_gfx10,
        sq_es1_counters_gfx10,
        sq_es2_counters_gfx10,
        sq_es3_counters_gfx10,
        sq_gs0_counters_gfx10,
        sq_gs1_counters_gfx10,
        sq_gs2_counters_gfx10,
        sq_gs3_counters_gfx10,
        sq_vs0_counters_gfx10,
        sq_vs1_counters_gfx10,
        sq_vs2_counters_gfx10,
        sq_vs3_counters_gfx10,
        sq_ps0_counters_gfx10,
        sq_ps1_counters_gfx10,
        sq_ps2_counters_gfx10,
        sq_ps3_counters_gfx10,
        sq_ls0_counters_gfx10,
        sq_ls1_counters_gfx10,
        sq_ls2_counters_gfx10,
        sq_ls3_counters_gfx10,
        sq_hs0_counters_gfx10,
        sq_hs1_counters_gfx10,
        sq_hs2_counters_gfx10,
        sq_hs3_counters_gfx10,
        sq_cs0_counters_gfx10,
        sq_cs1_counters_gfx10,
        sq_cs2_counters_gfx10,
        sq_cs3_counters_gfx10,
        sx0_counters_gfx10,
        sx1_counters_gfx10,
        sx2_counters_gfx10,
        sx3_counters_gfx10,
        sx4_counters_gfx10,
        sx5_counters_gfx10,
        sx6_counters_gfx10,
        sx7_counters_gfx10,
        ta0_counters_gfx10,
        ta1_counters_gfx10,
        ta2_counters_gfx10,
        ta3_counters_gfx10,
        ta4_counters_gfx10,
        ta5_counters_gfx10,
        ta6_counters_gfx10,
        ta7_counters_gfx10,
        ta8_counters_gfx10,
        ta9_counters_gfx10,
        ta10_counters_gfx10,
        ta11_counters_gfx10,
        ta12_counters_gfx10,
        ta13_counters_gfx10,
        ta14_counters_gfx10,
        ta15_counters_gfx10,
        ta16_counters_gfx10,
        ta17_counters_gfx10,
        ta18_counters_gfx10,
        ta19_counters_gfx10,
        ta20_counters_gfx10,
        ta21_counters_gfx10,
        ta22_counters_gfx10,
        ta23_counters_gfx10,
        ta24_counters_gfx10,
        ta25_counters_gfx10,
        ta26_counters_gfx10,
        ta27_counters_gfx10,
        ta28_counters_gfx10,
        ta29_counters_gfx10,
        ta30_counters_gfx10,
        ta31_counters_gfx10,
        ta32_counters_gfx10,
        ta33_counters_gfx10,
        ta34_counters_gfx10,
        ta35_counters_gfx10,
        ta36_counters_gfx10,
        ta37_counters_gfx10,
        ta38_counters_gfx10,
        ta39_counters_gfx10,
        ta40_counters_gfx10,
        ta41_counters_gfx10,
        ta42_counters_gfx10,
        ta43_counters_gfx10,
        ta44_counters_gfx10,
        ta45_counters_gfx10,
        ta46_counters_gfx10,
        ta47_counters_gfx10,
        ta48_counters_gfx10,
        ta49_counters_gfx10,
        ta50_counters_gfx10,
        ta51_counters_gfx10,
        ta52_counters_gfx10,
        ta53_counters_gfx10,
        ta54_counters_gfx10,
        ta55_counters_gfx10,
        ta56_counters_gfx10,
        ta57_counters_gfx10,
        ta58_counters_gfx10,
        ta59_counters_gfx10,
        ta60_counters_gfx10,
        ta61_counters_gfx10,
        ta62_counters_gfx10,
        ta63_counters_gfx10,
        ta64_counters_gfx10,
        ta65_counters_gfx10,
        ta66_counters_gfx10,
        ta67_counters_gfx10,
        ta68_counters_gfx10,
        ta69_counters_gfx10,
        ta70_counters_gfx10,
        ta71_counters_gfx10,
        ta72_counters_gfx10,
        ta73_counters_gfx10,
        ta74_counters_gfx10,
        ta75_counters_gfx10,
        ta76_counters_gfx10,
        ta77_counters_gfx10,
        ta78_counters_gfx10,
        ta79_counters_gfx10,
        td0_counters_gfx10,
        td1_counters_gfx10,
        td2_counters_gfx10,
        td3_counters_gfx10,
        td4_counters_gfx10,
        td5_counters_gfx10,
        td6_counters_gfx10,
        td7_counters_gfx10,
        td8_counters_gfx10,
        td9_counters_gfx10,
        td10_counters_gfx10,
        td11_counters_gfx10,
        td12_counters_gfx10,
        td13_counters_gfx10,
        td14_counters_gfx10,
        td15_counters_gfx10,
        td16_counters_gfx10,
        td17_counters_gfx10,
        td18_counters_gfx10,
        td19_counters_gfx10,
        td20_counters_gfx10,
        td21_counters_gfx10,
        td22_counters_gfx10,
        td23_counters_gfx10,
        td24_counters_gfx10,
        td25_counters_gfx10,
        td26_counters_gfx10,
        td27_counters_gfx10,
        td28_counters_gfx10,
        td29_counters_gfx10,
        td30_counters_gfx10,
        td31_counters_gfx10,
        td32_counters_gfx10,
        td33_counters_gfx10,
        td34_counters_gfx10,
        td35_counters_gfx10,
        td36_counters_gfx10,
        td37_counters_gfx10,
        td38_counters_gfx10,
        td39_counters_gfx10,
        td40_counters_gfx10,
        td41_counters_gfx10,
        td42_counters_gfx10,
        td43_counters_gfx10,
        td44_counters_gfx10,
        td45_counters_gfx10,
        td46_counters_gfx10,
        td47_counters_gfx10,
        td48_counters_gfx10,
        td49_counters_gfx10,
        td50_counters_gfx10,
        td51_counters_gfx10,
        td52_counters_gfx10,
        td53_counters_gfx10,
        td54_counters_gfx10,
        td55_counters_gfx10,
        td56_counters_gfx10,
        td57_counters_gfx10,
        td58_counters_gfx10,
        td59_counters_gfx10,
        td60_counters_gfx10,
        td61_counters_gfx10,
        td62_counters_gfx10,
        td63_counters_gfx10,
        td64_counters_gfx10,
        td65_counters_gfx10,
        td66_counters_gfx10,
        td67_counters_gfx10,
        td68_counters_gfx10,
        td69_counters_gfx10,
        td70_counters_gfx10,
        td71_counters_gfx10,
        td72_counters_gfx10,
        td73_counters_gfx10,
        td74_counters_gfx10,
        td75_counters_gfx10,
        td76_counters_gfx10,
        td77_counters_gfx10,
        td78_counters_gfx10,
        td79_counters_gfx10,
        tcp0_counters_gfx10,
        tcp1_counters_gfx10,
        tcp2_counters_gfx10,
        tcp3_counters_gfx10,
        tcp4_counters_gfx10,
        tcp5_counters_gfx10,
        tcp6_counters_gfx10,
        tcp7_counters_gfx10,
        tcp8_counters_gfx10,
        tcp9_counters_gfx10,
        tcp10_counters_gfx10,
        tcp11_counters_gfx10,
        tcp12_counters_gfx10,
        tcp13_counters_gfx10,
        tcp14_counters_gfx10,
        tcp15_counters_gfx10,
        tcp16_counters_gfx10,
        tcp17_counters_gfx10,
        tcp18_counters_gfx10,
        tcp19_counters_gfx10,
        tcp20_counters_gfx10,
        tcp21_counters_gfx10,
        tcp22_counters_gfx10,
        tcp23_counters_gfx10,
        tcp24_counters_gfx10,
        tcp25_counters_gfx10,
        tcp26_counters_gfx10,
        tcp27_counters_gfx10,
        tcp28_counters_gfx10,
        tcp29_counters_gfx10,
        tcp30_counters_gfx10,
        tcp31_counters_gfx10,
        tcp32_counters_gfx10,
        tcp33_counters_gfx10,
        tcp34_counters_gfx10,
        tcp35_counters_gfx10,
        tcp36_counters_gfx10,
        tcp37_counters_gfx10,
        tcp38_counters_gfx10,
        tcp39_counters_gfx10,
        tcp40_counters_gfx10,
        tcp41_counters_gfx10,
        tcp42_counters_gfx10,
        tcp43_counters_gfx10,
        tcp44_counters_gfx10,
        tcp45_counters_gfx10,
        tcp46_counters_gfx10,
        tcp47_counters_gfx10,
        tcp48_counters_gfx10,
        tcp49_counters_gfx10,
        tcp50_counters_gfx10,
        tcp51_counters_gfx10,
        tcp52_counters_gfx10,
        tcp53_counters_gfx10,
        tcp54_counters_gfx10,
        tcp55_counters_gfx10,
        tcp56_counters_gfx10,
        tcp57_counters_gfx10,
        tcp58_counters_gfx10,
        tcp59_counters_gfx10,
        tcp60_counters_gfx10,
        tcp61_counters_gfx10,
        tcp62_counters_gfx10,
        tcp63_counters_gfx10,
        tcp64_counters_gfx10,
        tcp65_counters_gfx10,
        tcp66_counters_gfx10,
        tcp67_counters_gfx10,
        tcp68_counters_gfx10,
        tcp69_counters_gfx10,
        tcp70_counters_gfx10,
        tcp71_counters_gfx10,
        tcp72_counters_gfx10,
        tcp73_counters_gfx10,
        tcp74_counters_gfx10,
        tcp75_counters_gfx10,
        tcp76_counters_gfx10,
        tcp77_counters_gfx10,
        tcp78_counters_gfx10,
        tcp79_counters_gfx10,
        db0_counters_gfx10,
        db1_counters_gfx10,
        db2_counters_gfx10,
        db3_counters_gfx10,
        db4_counters_gfx10,
        db5_counters_gfx10,
        db6_counters_gfx10,
        db7_counters_gfx10,
        db8_counters_gfx10,
        db9_counters_gfx10,
        db10_counters_gfx10,
        db11_counters_gfx10,
        db12_counters_gfx10,
        db13_counters_gfx10,
        db14_counters_gfx10,
        db15_counters_gfx10,
        db16_counters_gfx10,
        db17_counters_gfx10,
        db18_counters_gfx10,
        db19_counters_gfx10,
        db20_counters_gfx10,
        db21_counters_gfx10,
        db22_counters_gfx10,
        db23_counters_gfx10,
        db24_counters_gfx10,
        db25_counters_gfx10,
        db26_counters_gfx10,
        db27_counters_gfx10,
        db28_counters_gfx10,
        db29_counters_gfx10,
        db30_counters_gfx10,
        db31_counters_gfx10,
        cb0_counters_gfx10,
        cb1_counters_gfx10,
        cb2_counters_gfx10,
        cb3_counters_gfx10,
        cb4_counters_gfx10,
        cb5_counters_gfx10,
        cb6_counters_gfx10,
        cb7_counters_gfx10,
        cb8_counters_gfx10,
        cb9_counters_gfx10,
        cb10_counters_gfx10,
        cb11_counters_gfx10,
        cb12_counters_gfx10,
        cb13_counters_gfx10,
        cb14_counters_gfx10,
        cb15_counters_gfx10,
        cb16_counters_gfx10,
        cb17_counters_gfx10,
        cb18_counters_gfx10,
        cb19_counters_gfx10,
        cb20_counters_gfx10,
        cb21_counters_gfx10,
        cb22_counters_gfx10,
        cb23_counters_gfx10,
        cb24_counters_gfx10,
        cb25_counters_gfx10,
        cb26_counters_gfx10,
        cb27_counters_gfx10,
        cb28_counters_gfx10,
        cb29_counters_gfx10,
        cb30_counters_gfx10,
        cb31_counters_gfx10,
        gds_counters_gfx10,
        grbm_counters_gfx10,
        grbmse0_counters_gfx10,
        grbmse1_counters_gfx10,
        grbmse2_counters_gfx10,
        grbmse3_counters_gfx10,
        rlc_counters_gfx10,
        sdma0_counters_gfx10,
        sdma1_counters_gfx10,
        cpg_counters_gfx10,
        cpc_counters_gfx10,
        atc_counters_gfx10,
        atcl2_counters_gfx10,
        mcvml2_counters_gfx10,
        gcea0_counters_gfx10,
        gcea1_counters_gfx10,
        gcea2_counters_gfx10,
        gcea3_counters_gfx10,
        gcea4_counters_gfx10,
        gcea5_counters_gfx10,
        gcea6_counters_gfx10,
        gcea7_counters_gfx10,
        gcea8_counters_gfx10,
        gcea9_counters_gfx10,
        gcea10_counters_gfx10,
        gcea11_counters_gfx10,
        gcea12_counters_gfx10,
        gcea13_counters_gfx10,
        gcea14_counters_gfx10,
        gcea15_counters_gfx10,
        rpb_counters_gfx10,
        rmi0_counters_gfx10,
        rmi1_counters_gfx10,
        rmi2_counters_gfx10,
        rmi3_counters_gfx10,
        rmi4_counters_gfx10,
        rmi5_counters_gfx10,
        rmi6_counters_gfx10,
        rmi7_counters_gfx10,
        rmi8_counters_gfx10,
        rmi9_counters_gfx10,
        rmi10_counters_gfx10,
        rmi11_counters_gfx10,
        rmi12_counters_gfx10,
        rmi13_counters_gfx10,
        rmi14_counters_gfx10,
        rmi15_counters_gfx10,
        umc0_counters_gfx10,
        umc1_counters_gfx10,
        umc2_counters_gfx10,
        umc3_counters_gfx10,
        umc4_counters_gfx10,
        umc5_counters_gfx10,
        umc6_counters_gfx10,
        umc7_counters_gfx10,
        umc8_counters_gfx10,
        umc9_counters_gfx10,
        umc10_counters_gfx10,
        umc11_counters_gfx10,
        umc12_counters_gfx10,
        umc13_counters_gfx10,
        umc14_counters_gfx10,
        umc15_counters_gfx10,
        umc16_counters_gfx10,
        umc17_counters_gfx10,
        umc18_counters_gfx10,
        umc19_counters_gfx10,
        ge_counters_gfx10,
        gl1a0_counters_gfx10,
        gl1a1_counters_gfx10,
        gl1a2_counters_gfx10,
        gl1a3_counters_gfx10,
        gl1a4_counters_gfx10,
        gl1a5_counters_gfx10,
        gl1a6_counters_gfx10,
        gl1a7_counters_gfx10,
        gl1c0_counters_gfx10,
        gl1c1_counters_gfx10,
        gl1c2_counters_gfx10,
        gl1c3_counters_gfx10,
        gl1c4_counters_gfx10,
        gl1c5_counters_gfx10,
        gl1c6_counters_gfx10,
        gl1c7_counters_gfx10,
        gl1c8_counters_gfx10,
        gl1c9_counters_gfx10,
        gl1c10_counters_gfx10,
        gl1c11_counters_gfx10,
        gl1c12_counters_gfx10,
        gl1c13_counters_gfx10,
        gl1c14_counters_gfx10,
        gl1c15_counters_gfx10,
        gl1cg0_counters_gfx10,
        gl1cg1_counters_gfx10,
        gl1cg2_counters_gfx10,
        gl1cg3_counters_gfx10,
        gl1cg4_counters_gfx10,
        gl1cg5_counters_gfx10,
        gl1cg6_counters_gfx10,
        gl1cg7_counters_gfx10,
        gl1cg8_counters_gfx10,
        gl1cg9_counters_gfx10,
        gl1cg10_counters_gfx10,
        gl1cg11_counters_gfx10,
        gl1cg12_counters_gfx10,
        gl1cg13_counters_gfx10,
        gl1cg14_counters_gfx10,
        gl1cg15_counters_gfx10,
        gl1cg16_counters_gfx10,
        gl1cg17_counters_gfx10,
        gl1cg18_counters_gfx10,
        gl1cg19_counters_gfx10,
        gl1cg20_counters_gfx10,
        gl1cg21_counters_gfx10,
        gl1cg22_counters_gfx10,
        gl1cg23_counters_gfx10,
        gl1cg24_counters_gfx10,
        gl1cg25_counters_gfx10,
        gl1cg26_counters_gfx10,
        gl1cg27_counters_gfx10,
        gl1cg28_counters_gfx10,
        gl1cg29_counters_gfx10,
        gl1cg30_counters_gfx10,
        gl1cg31_counters_gfx10,
        gl2a0_counters_gfx10,
        gl2a1_counters_gfx10,
        gl2a2_counters_gfx10,
        gl2a3_counters_gfx10,
        gl2c0_counters_gfx10,
        gl2c1_counters_gfx10,
        gl2c2_counters_gfx10,
        gl2c3_counters_gfx10,
        gl2c4_counters_gfx10,
        gl2c5_counters_gfx10,
        gl2c6_counters_gfx10,
        gl2c7_counters_gfx10,
        gl2c8_counters_gfx10,
        gl2c9_counters_gfx10,
        gl2c10_counters_gfx10,
        gl2c11_counters_gfx10,
        gl2c12_counters_gfx10,
        gl2c13_counters_gfx10,
        gl2c14_counters_gfx10,
        gl2c15_counters_gfx10,
        gl2c16_counters_gfx10,
        gl2c17_counters_gfx10,
        gl2c18_counters_gfx10,
        gl2c19_counters_gfx10,
        gl2c20_counters_gfx10,
        gl2c21_counters_gfx10,
        gl2c22_counters_gfx10,
        gl2c23_counters_gfx10,
        cha_counters_gfx10,
        chc0_counters_gfx10,
        chc1_counters_gfx10,
        chc2_counters_gfx10,
        chc3_counters_gfx10,
        chcg_counters_gfx10,
        gus_counters_gfx10,
        gcr_counters_gfx10,
        pa_ph_counters_gfx10,
        utcl10_counters_gfx10,
        utcl11_counters_gfx10,
        utcl12_counters_gfx10,
        utcl13_counters_gfx10,
        utcl14_counters_gfx10,
        utcl15_counters_gfx10,
        utcl16_counters_gfx10,
        utcl17_counters_gfx10,
        gputime_counters_gfx10,
    };

    GPA_HardwareCounterDesc* dx12_exposed_counters_group_array_gfx10[] = {
        cpf_exposed_counters_gfx10,
        pa_su0_exposed_counters_gfx10,
        pa_su1_exposed_counters_gfx10,
        pa_su2_exposed_counters_gfx10,
        pa_su3_exposed_counters_gfx10,
        pa_su4_exposed_counters_gfx10,
        pa_su5_exposed_counters_gfx10,
        pa_su6_exposed_counters_gfx10,
        pa_su7_exposed_counters_gfx10,
        pa_sc0_exposed_counters_gfx10,
        pa_sc1_exposed_counters_gfx10,
        pa_sc2_exposed_counters_gfx10,
        pa_sc3_exposed_counters_gfx10,
        pa_sc4_exposed_counters_gfx10,
        pa_sc5_exposed_counters_gfx10,
        pa_sc6_exposed_counters_gfx10,
        pa_sc7_exposed_counters_gfx10,
        pa_sc8_exposed_counters_gfx10,
        pa_sc9_exposed_counters_gfx10,
        pa_sc10_exposed_counters_gfx10,
        pa_sc11_exposed_counters_gfx10,
        pa_sc12_exposed_counters_gfx10,
        pa_sc13_exposed_counters_gfx10,
        pa_sc14_exposed_counters_gfx10,
        pa_sc15_exposed_counters_gfx10,
        spi0_exposed_counters_gfx10,
        spi1_exposed_counters_gfx10,
        spi2_exposed_counters_gfx10,
        spi3_exposed_counters_gfx10,
        sq0_exposed_counters_gfx10,
        sq1_exposed_counters_gfx10,
        sq2_exposed_counters_gfx10,
        sq3_exposed_counters_gfx10,
        sq_es0_exposed_counters_gfx10,
        sq_es1_exposed_counters_gfx10,
        sq_es2_exposed_counters_gfx10,
        sq_es3_exposed_counters_gfx10,
        sq_gs0_exposed_counters_gfx10,
        sq_gs1_exposed_counters_gfx10,
        sq_gs2_exposed_counters_gfx10,
        sq_gs3_exposed_counters_gfx10,
        sq_vs0_exposed_counters_gfx10,
        sq_vs1_exposed_counters_gfx10,
        sq_vs2_exposed_counters_gfx10,
        sq_vs3_exposed_counters_gfx10,
        sq_ps0_exposed_counters_gfx10,
        sq_ps1_exposed_counters_gfx10,
        sq_ps2_exposed_counters_gfx10,
        sq_ps3_exposed_counters_gfx10,
        sq_ls0_exposed_counters_gfx10,
        sq_ls1_exposed_counters_gfx10,
        sq_ls2_exposed_counters_gfx10,
        sq_ls3_exposed_counters_gfx10,
        sq_hs0_exposed_counters_gfx10,
        sq_hs1_exposed_counters_gfx10,
        sq_hs2_exposed_counters_gfx10,
        sq_hs3_exposed_counters_gfx10,
        sq_cs0_exposed_counters_gfx10,
        sq_cs1_exposed_counters_gfx10,
        sq_cs2_exposed_counters_gfx10,
        sq_cs3_exposed_counters_gfx10,
        sx0_exposed_counters_gfx10,
        sx1_exposed_counters_gfx10,
        sx2_exposed_counters_gfx10,
        sx3_exposed_counters_gfx10,
        sx4_exposed_counters_gfx10,
        sx5_exposed_counters_gfx10,
        sx6_exposed_counters_gfx10,
        sx7_exposed_counters_gfx10,
        ta0_exposed_counters_gfx10,
        ta1_exposed_counters_gfx10,
        ta2_exposed_counters_gfx10,
        ta3_exposed_counters_gfx10,
        ta4_exposed_counters_gfx10,
        ta5_exposed_counters_gfx10,
        ta6_exposed_counters_gfx10,
        ta7_exposed_counters_gfx10,
        ta8_exposed_counters_gfx10,
        ta9_exposed_counters_gfx10,
        ta10_exposed_counters_gfx10,
        ta11_exposed_counters_gfx10,
        ta12_exposed_counters_gfx10,
        ta13_exposed_counters_gfx10,
        ta14_exposed_counters_gfx10,
        ta15_exposed_counters_gfx10,
        ta16_exposed_counters_gfx10,
        ta17_exposed_counters_gfx10,
        ta18_exposed_counters_gfx10,
        ta19_exposed_counters_gfx10,
        ta20_exposed_counters_gfx10,
        ta21_exposed_counters_gfx10,
        ta22_exposed_counters_gfx10,
        ta23_exposed_counters_gfx10,
        ta24_exposed_counters_gfx10,
        ta25_exposed_counters_gfx10,
        ta26_exposed_counters_gfx10,
        ta27_exposed_counters_gfx10,
        ta28_exposed_counters_gfx10,
        ta29_exposed_counters_gfx10,
        ta30_exposed_counters_gfx10,
        ta31_exposed_counters_gfx10,
        ta32_exposed_counters_gfx10,
        ta33_exposed_counters_gfx10,
        ta34_exposed_counters_gfx10,
        ta35_exposed_counters_gfx10,
        ta36_exposed_counters_gfx10,
        ta37_exposed_counters_gfx10,
        ta38_exposed_counters_gfx10,
        ta39_exposed_counters_gfx10,
        ta40_exposed_counters_gfx10,
        ta41_exposed_counters_gfx10,
        ta42_exposed_counters_gfx10,
        ta43_exposed_counters_gfx10,
        ta44_exposed_counters_gfx10,
        ta45_exposed_counters_gfx10,
        ta46_exposed_counters_gfx10,
        ta47_exposed_counters_gfx10,
        ta48_exposed_counters_gfx10,
        ta49_exposed_counters_gfx10,
        ta50_exposed_counters_gfx10,
        ta51_exposed_counters_gfx10,
        ta52_exposed_counters_gfx10,
        ta53_exposed_counters_gfx10,
        ta54_exposed_counters_gfx10,
        ta55_exposed_counters_gfx10,
        ta56_exposed_counters_gfx10,
        ta57_exposed_counters_gfx10,
        ta58_exposed_counters_gfx10,
        ta59_exposed_counters_gfx10,
        ta60_exposed_counters_gfx10,
        ta61_exposed_counters_gfx10,
        ta62_exposed_counters_gfx10,
        ta63_exposed_counters_gfx10,
        ta64_exposed_counters_gfx10,
        ta65_exposed_counters_gfx10,
        ta66_exposed_counters_gfx10,
        ta67_exposed_counters_gfx10,
        ta68_exposed_counters_gfx10,
        ta69_exposed_counters_gfx10,
        ta70_exposed_counters_gfx10,
        ta71_exposed_counters_gfx10,
        ta72_exposed_counters_gfx10,
        ta73_exposed_counters_gfx10,
        ta74_exposed_counters_gfx10,
        ta75_exposed_counters_gfx10,
        ta76_exposed_counters_gfx10,
        ta77_exposed_counters_gfx10,
        ta78_exposed_counters_gfx10,
        ta79_exposed_counters_gfx10,
        tcp0_exposed_counters_gfx10,
        tcp1_exposed_counters_gfx10,
        tcp2_exposed_counters_gfx10,
        tcp3_exposed_counters_gfx10,
        tcp4_exposed_counters_gfx10,
        tcp5_exposed_counters_gfx10,
        tcp6_exposed_counters_gfx10,
        tcp7_exposed_counters_gfx10,
        tcp8_exposed_counters_gfx10,
        tcp9_exposed_counters_gfx10,
        tcp10_exposed_counters_gfx10,
        tcp11_exposed_counters_gfx10,
        tcp12_exposed_counters_gfx10,
        tcp13_exposed_counters_gfx10,
        tcp14_exposed_counters_gfx10,
        tcp15_exposed_counters_gfx10,
        tcp16_exposed_counters_gfx10,
        tcp17_exposed_counters_gfx10,
        tcp18_exposed_counters_gfx10,
        tcp19_exposed_counters_gfx10,
        tcp20_exposed_counters_gfx10,
        tcp21_exposed_counters_gfx10,
        tcp22_exposed_counters_gfx10,
        tcp23_exposed_counters_gfx10,
        tcp24_exposed_counters_gfx10,
        tcp25_exposed_counters_gfx10,
        tcp26_exposed_counters_gfx10,
        tcp27_exposed_counters_gfx10,
        tcp28_exposed_counters_gfx10,
        tcp29_exposed_counters_gfx10,
        tcp30_exposed_counters_gfx10,
        tcp31_exposed_counters_gfx10,
        tcp32_exposed_counters_gfx10,
        tcp33_exposed_counters_gfx10,
        tcp34_exposed_counters_gfx10,
        tcp35_exposed_counters_gfx10,
        tcp36_exposed_counters_gfx10,
        tcp37_exposed_counters_gfx10,
        tcp38_exposed_counters_gfx10,
        tcp39_exposed_counters_gfx10,
        tcp40_exposed_counters_gfx10,
        tcp41_exposed_counters_gfx10,
        tcp42_exposed_counters_gfx10,
        tcp43_exposed_counters_gfx10,
        tcp44_exposed_counters_gfx10,
        tcp45_exposed_counters_gfx10,
        tcp46_exposed_counters_gfx10,
        tcp47_exposed_counters_gfx10,
        tcp48_exposed_counters_gfx10,
        tcp49_exposed_counters_gfx10,
        tcp50_exposed_counters_gfx10,
        tcp51_exposed_counters_gfx10,
        tcp52_exposed_counters_gfx10,
        tcp53_exposed_counters_gfx10,
        tcp54_exposed_counters_gfx10,
        tcp55_exposed_counters_gfx10,
        tcp56_exposed_counters_gfx10,
        tcp57_exposed_counters_gfx10,
        tcp58_exposed_counters_gfx10,
        tcp59_exposed_counters_gfx10,
        tcp60_exposed_counters_gfx10,
        tcp61_exposed_counters_gfx10,
        tcp62_exposed_counters_gfx10,
        tcp63_exposed_counters_gfx10,
        tcp64_exposed_counters_gfx10,
        tcp65_exposed_counters_gfx10,
        tcp66_exposed_counters_gfx10,
        tcp67_exposed_counters_gfx10,
        tcp68_exposed_counters_gfx10,
        tcp69_exposed_counters_gfx10,
        tcp70_exposed_counters_gfx10,
        tcp71_exposed_counters_gfx10,
        tcp72_exposed_counters_gfx10,
        tcp73_exposed_counters_gfx10,
        tcp74_exposed_counters_gfx10,
        tcp75_exposed_counters_gfx10,
        tcp76_exposed_counters_gfx10,
        tcp77_exposed_counters_gfx10,
        tcp78_exposed_counters_gfx10,
        tcp79_exposed_counters_gfx10,
        db0_exposed_counters_gfx10,
        db1_exposed_counters_gfx10,
        db2_exposed_counters_gfx10,
        db3_exposed_counters_gfx10,
        db4_exposed_counters_gfx10,
        db5_exposed_counters_gfx10,
        db6_exposed_counters_gfx10,
        db7_exposed_counters_gfx10,
        db8_exposed_counters_gfx10,
        db9_exposed_counters_gfx10,
        db10_exposed_counters_gfx10,
        db11_exposed_counters_gfx10,
        db12_exposed_counters_gfx10,
        db13_exposed_counters_gfx10,
        db14_exposed_counters_gfx10,
        db15_exposed_counters_gfx10,
        db16_exposed_counters_gfx10,
        db17_exposed_counters_gfx10,
        db18_exposed_counters_gfx10,
        db19_exposed_counters_gfx10,
        db20_exposed_counters_gfx10,
        db21_exposed_counters_gfx10,
        db22_exposed_counters_gfx10,
        db23_exposed_counters_gfx10,
        db24_exposed_counters_gfx10,
        db25_exposed_counters_gfx10,
        db26_exposed_counters_gfx10,
        db27_exposed_counters_gfx10,
        db28_exposed_counters_gfx10,
        db29_exposed_counters_gfx10,
        db30_exposed_counters_gfx10,
        db31_exposed_counters_gfx10,
        cb0_exposed_counters_gfx10,
        cb1_exposed_counters_gfx10,
        cb2_exposed_counters_gfx10,
        cb3_exposed_counters_gfx10,
        cb4_exposed_counters_gfx10,
        cb5_exposed_counters_gfx10,
        cb6_exposed_counters_gfx10,
        cb7_exposed_counters_gfx10,
        cb8_exposed_counters_gfx10,
        cb9_exposed_counters_gfx10,
        cb10_exposed_counters_gfx10,
        cb11_exposed_counters_gfx10,
        cb12_exposed_counters_gfx10,
        cb13_exposed_counters_gfx10,
        cb14_exposed_counters_gfx10,
        cb15_exposed_counters_gfx10,
        cb16_exposed_counters_gfx10,
        cb17_exposed_counters_gfx10,
        cb18_exposed_counters_gfx10,
        cb19_exposed_counters_gfx10,
        cb20_exposed_counters_gfx10,
        cb21_exposed_counters_gfx10,
        cb22_exposed_counters_gfx10,
        cb23_exposed_counters_gfx10,
        cb24_exposed_counters_gfx10,
        cb25_exposed_counters_gfx10,
        cb26_exposed_counters_gfx10,
        cb27_exposed_counters_gfx10,
        cb28_exposed_counters_gfx10,
        cb29_exposed_counters_gfx10,
        cb30_exposed_counters_gfx10,
        cb31_exposed_counters_gfx10,
        grbm_exposed_counters_gfx10,
        gcea0_exposed_counters_gfx10,
        gcea1_exposed_counters_gfx10,
        gcea2_exposed_counters_gfx10,
        gcea3_exposed_counters_gfx10,
        gcea4_exposed_counters_gfx10,
        gcea5_exposed_counters_gfx10,
        gcea6_exposed_counters_gfx10,
        gcea7_exposed_counters_gfx10,
        gcea8_exposed_counters_gfx10,
        gcea9_exposed_counters_gfx10,
        gcea10_exposed_counters_gfx10,
        gcea11_exposed_counters_gfx10,
        gcea12_exposed_counters_gfx10,
        gcea13_exposed_counters_gfx10,
        gcea14_exposed_counters_gfx10,
        gcea15_exposed_counters_gfx10,
        ge_exposed_counters_gfx10,
        gl1c0_exposed_counters_gfx10,
        gl1c1_exposed_counters_gfx10,
        gl1c2_exposed_counters_gfx10,
        gl1c3_exposed_counters_gfx10,
        gl1c4_exposed_counters_gfx10,
        gl1c5_exposed_counters_gfx10,
        gl1c6_exposed_counters_gfx10,
        gl1c7_exposed_counters_gfx10,
        gl1c8_exposed_counters_gfx10,
        gl1c9_exposed_counters_gfx10,
        gl1c10_exposed_counters_gfx10,
        gl1c11_exposed_counters_gfx10,
        gl1c12_exposed_counters_gfx10,
        gl1c13_exposed_counters_gfx10,
        gl1c14_exposed_counters_gfx10,
        gl1c15_exposed_counters_gfx10,
        gl2c0_exposed_counters_gfx10,
        gl2c1_exposed_counters_gfx10,
        gl2c2_exposed_counters_gfx10,
        gl2c3_exposed_counters_gfx10,
        gl2c4_exposed_counters_gfx10,
        gl2c5_exposed_counters_gfx10,
        gl2c6_exposed_counters_gfx10,
        gl2c7_exposed_counters_gfx10,
        gl2c8_exposed_counters_gfx10,
        gl2c9_exposed_counters_gfx10,
        gl2c10_exposed_counters_gfx10,
        gl2c11_exposed_counters_gfx10,
        gl2c12_exposed_counters_gfx10,
        gl2c13_exposed_counters_gfx10,
        gl2c14_exposed_counters_gfx10,
        gl2c15_exposed_counters_gfx10,
        gl2c16_exposed_counters_gfx10,
        gl2c17_exposed_counters_gfx10,
        gl2c18_exposed_counters_gfx10,
        gl2c19_exposed_counters_gfx10,
        gl2c20_exposed_counters_gfx10,
        gl2c21_exposed_counters_gfx10,
        gl2c22_exposed_counters_gfx10,
        gl2c23_exposed_counters_gfx10,
        gputime_exposed_counters_gfx10,
    };

    GPA_CounterGroupDesc hw_dx12_groups_gfx10[] = {
        {0, "CPF", 0, 40, 2, 4},
        {1, "PA_SU0", 0, 266, 4, 16},
        {2, "PA_SU1", 1, 266, 4, 16},
        {3, "PA_SU2", 2, 266, 4, 16},
        {4, "PA_SU3", 3, 266, 4, 16},
        {5, "PA_SU4", 4, 266, 4, 16},
        {6, "PA_SU5", 5, 266, 4, 16},
        {7, "PA_SU6", 6, 266, 4, 16},
        {8, "PA_SU7", 7, 266, 4, 16},
        {9, "PA_SC0", 0, 552, 8, 4},
        {10, "PA_SC1", 1, 552, 8, 4},
        {11, "PA_SC2", 2, 552, 8, 4},
        {12, "PA_SC3", 3, 552, 8, 4},
        {13, "PA_SC4", 4, 552, 8, 4},
        {14, "PA_SC5", 5, 552, 8, 4},
        {15, "PA_SC6", 6, 552, 8, 4},
        {16, "PA_SC7", 7, 552, 8, 4},
        {17, "PA_SC8", 8, 552, 8, 4},
        {18, "PA_SC9", 9, 552, 8, 4},
        {19, "PA_SC10", 10, 552, 8, 4},
        {20, "PA_SC11", 11, 552, 8, 4},
        {21, "PA_SC12", 12, 552, 8, 4},
        {22, "PA_SC13", 13, 552, 8, 4},
        {23, "PA_SC14", 14, 552, 8, 4},
        {24, "PA_SC15", 15, 552, 8, 4},
        {25, "SPI0", 0, 329, 6, 16},
        {26, "SPI1", 1, 329, 6, 16},
        {27, "SPI2", 2, 329, 6, 16},
        {28, "SPI3", 3, 329, 6, 16},
        {29, "SQ0", 0, 512, 16, 16},
        {30, "SQ1", 1, 512, 16, 16},
        {31, "SQ2", 2, 512, 16, 16},
        {32, "SQ3", 3, 512, 16, 16},
        {33, "SQ_ES0", 0, 512, 16, 16},
        {34, "SQ_ES1", 1, 512, 16, 16},
        {35, "SQ_ES2", 2, 512, 16, 16},
        {36, "SQ_ES3", 3, 512, 16, 16},
        {37, "SQ_GS0", 0, 512, 16, 16},
        {38, "SQ_GS1", 1, 512, 16, 16},
        {39, "SQ_GS2", 2, 512, 16, 16},
        {40, "SQ_GS3", 3, 512, 16, 16},
        {41, "SQ_VS0", 0, 512, 16, 16},
        {42, "SQ_VS1", 1, 512, 16, 16},
        {43, "SQ_VS2", 2, 512, 16, 16},
        {44, "SQ_VS3", 3, 512, 16, 16},
        {45, "SQ_PS0", 0, 512, 16, 16},
        {46, "SQ_PS1", 1, 512, 16, 16},
        {47, "SQ_PS2", 2, 512, 16, 16},
        {48, "SQ_PS3", 3, 512, 16, 16},
        {49, "SQ_LS0", 0, 512, 16, 16},
        {50, "SQ_LS1", 1, 512, 16, 16},
        {51, "SQ_LS2", 2, 512, 16, 16},
        {52, "SQ_LS3", 3, 512, 16, 16},
        {53, "SQ_HS0", 0, 512, 16, 16},
        {54, "SQ_HS1", 1, 512, 16, 16},
        {55, "SQ_HS2", 2, 512, 16, 16},
        {56, "SQ_HS3", 3, 512, 16, 16},
        {57, "SQ_CS0", 0, 512, 16, 16},
        {58, "SQ_CS1", 1, 512, 16, 16},
        {59, "SQ_CS2", 2, 512, 16, 16},
        {60, "SQ_CS3", 3, 512, 16, 16},
        {61, "SX0", 0, 225, 4, 8},
        {62, "SX1", 1, 225, 4, 8},
        {63, "SX2", 2, 225, 4, 8},
        {64, "SX3", 3, 225, 4, 8},
        {65, "SX4", 4, 225, 4, 8},
        {66, "SX5", 5, 225, 4, 8},
        {67, "SX6", 6, 225, 4, 8},
        {68, "SX7", 7, 225, 4, 8},
        {69, "TA0", 0, 226, 2, 4},
        {70, "TA1", 1, 226, 2, 4},
        {71, "TA2", 2, 226, 2, 4},
        {72, "TA3", 3, 226, 2, 4},
        {73, "TA4", 4, 226, 2, 4},
        {74, "TA5", 5, 226, 2, 4},
        {75, "TA6", 6, 226, 2, 4},
        {76, "TA7", 7, 226, 2, 4},
        {77, "TA8", 8, 226, 2, 4},
        {78, "TA9", 9, 226, 2, 4},
        {79, "TA10", 10, 226, 2, 4},
        {80, "TA11", 11, 226, 2, 4},
        {81, "TA12", 12, 226, 2, 4},
        {82, "TA13", 13, 226, 2, 4},
        {83, "TA14", 14, 226, 2, 4},
        {84, "TA15", 15, 226, 2, 4},
        {85, "TA16", 16, 226, 2, 4},
        {86, "TA17", 17, 226, 2, 4},
        {87, "TA18", 18, 226, 2, 4},
        {88, "TA19", 19, 226, 2, 4},
        {89, "TA20", 20, 226, 2, 4},
        {90, "TA21", 21, 226, 2, 4},
        {91, "TA22", 22, 226, 2, 4},
        {92, "TA23", 23, 226, 2, 4},
        {93, "TA24", 24, 226, 2, 4},
        {94, "TA25", 25, 226, 2, 4},
        {95, "TA26", 26, 226, 2, 4},
        {96, "TA27", 27, 226, 2, 4},
        {97, "TA28", 28, 226, 2, 4},
        {98, "TA29", 29, 226, 2, 4},
        {99, "TA30", 30, 226, 2, 4},
        {100, "TA31", 31, 226, 2, 4},
        {101, "TA32", 32, 226, 2, 4},
        {102, "TA33", 33, 226, 2, 4},
        {103, "TA34", 34, 226, 2, 4},
        {104, "TA35", 35, 226, 2, 4},
        {105, "TA36", 36, 226, 2, 4},
        {106, "TA37", 37, 226, 2, 4},
        {107, "TA38", 38, 226, 2, 4},
        {108, "TA39", 39, 226, 2, 4},
        {109, "TA40", 40, 226, 2, 4},
        {110, "TA41", 41, 226, 2, 4},
        {111, "TA42", 42, 226, 2, 4},
        {112, "TA43", 43, 226, 2, 4},
        {113, "TA44", 44, 226, 2, 4},
        {114, "TA45", 45, 226, 2, 4},
        {115, "TA46", 46, 226, 2, 4},
        {116, "TA47", 47, 226, 2, 4},
        {117, "TA48", 48, 226, 2, 4},
        {118, "TA49", 49, 226, 2, 4},
        {119, "TA50", 50, 226, 2, 4},
        {120, "TA51", 51, 226, 2, 4},
        {121, "TA52", 52, 226, 2, 4},
        {122, "TA53", 53, 226, 2, 4},
        {123, "TA54", 54, 226, 2, 4},
        {124, "TA55", 55, 226, 2, 4},
        {125, "TA56", 56, 226, 2, 4},
        {126, "TA57", 57, 226, 2, 4},
        {127, "TA58", 58, 226, 2, 4},
        {128, "TA59", 59, 226, 2, 4},
        {129, "TA60", 60, 226, 2, 4},
        {130, "TA61", 61, 226, 2, 4},
        {131, "TA62", 62, 226, 2, 4},
        {132, "TA63", 63, 226, 2, 4},
        {133, "TA64", 64, 226, 2, 4},
        {134, "TA65", 65, 226, 2, 4},
        {135, "TA66", 66, 226, 2, 4},
        {136, "TA67", 67, 226, 2, 4},
        {137, "TA68", 68, 226, 2, 4},
        {138, "TA69", 69, 226, 2, 4},
        {139, "TA70", 70, 226, 2, 4},
        {140, "TA71", 71, 226, 2, 4},
        {141, "TA72", 72, 226, 2, 4},
        {142, "TA73", 73, 226, 2, 4},
        {143, "TA74", 74, 226, 2, 4},
        {144, "TA75", 75, 226, 2, 4},
        {145, "TA76", 76, 226, 2, 4},
        {146, "TA77", 77, 226, 2, 4},
        {147, "TA78", 78, 226, 2, 4},
        {148, "TA79", 79, 226, 2, 4},
        {149, "TD0", 0, 61, 2, 4},
        {150, "TD1", 1, 61, 2, 4},
        {151, "TD2", 2, 61, 2, 4},
        {152, "TD3", 3, 61, 2, 4},
        {153, "TD4", 4, 61, 2, 4},
        {154, "TD5", 5, 61, 2, 4},
        {155, "TD6", 6, 61, 2, 4},
        {156, "TD7", 7, 61, 2, 4},
        {157, "TD8", 8, 61, 2, 4},
        {158, "TD9", 9, 61, 2, 4},
        {159, "TD10", 10, 61, 2, 4},
        {160, "TD11", 11, 61, 2, 4},
        {161, "TD12", 12, 61, 2, 4},
        {162, "TD13", 13, 61, 2, 4},
        {163, "TD14", 14, 61, 2, 4},
        {164, "TD15", 15, 61, 2, 4},
        {165, "TD16", 16, 61, 2, 4},
        {166, "TD17", 17, 61, 2, 4},
        {167, "TD18", 18, 61, 2, 4},
        {168, "TD19", 19, 61, 2, 4},
        {169, "TD20", 20, 61, 2, 4},
        {170, "TD21", 21, 61, 2, 4},
        {171, "TD22", 22, 61, 2, 4},
        {172, "TD23", 23, 61, 2, 4},
        {173, "TD24", 24, 61, 2, 4},
        {174, "TD25", 25, 61, 2, 4},
        {175, "TD26", 26, 61, 2, 4},
        {176, "TD27", 27, 61, 2, 4},
        {177, "TD28", 28, 61, 2, 4},
        {178, "TD29", 29, 61, 2, 4},
        {179, "TD30", 30, 61, 2, 4},
        {180, "TD31", 31, 61, 2, 4},
        {181, "TD32", 32, 61, 2, 4},
        {182, "TD33", 33, 61, 2, 4},
        {183, "TD34", 34, 61, 2, 4},
        {184, "TD35", 35, 61, 2, 4},
        {185, "TD36", 36, 61, 2, 4},
        {186, "TD37", 37, 61, 2, 4},
        {187, "TD38", 38, 61, 2, 4},
        {188, "TD39", 39, 61, 2, 4},
        {189, "TD40", 40, 61, 2, 4},
        {190, "TD41", 41, 61, 2, 4},
        {191, "TD42", 42, 61, 2, 4},
        {192, "TD43", 43, 61, 2, 4},
        {193, "TD44", 44, 61, 2, 4},
        {194, "TD45", 45, 61, 2, 4},
        {195, "TD46", 46, 61, 2, 4},
        {196, "TD47", 47, 61, 2, 4},
        {197, "TD48", 48, 61, 2, 4},
        {198, "TD49", 49, 61, 2, 4},
        {199, "TD50", 50, 61, 2, 4},
        {200, "TD51", 51, 61, 2, 4},
        {201, "TD52", 52, 61, 2, 4},
        {202, "TD53", 53, 61, 2, 4},
        {203, "TD54", 54, 61, 2, 4},
        {204, "TD55", 55, 61, 2, 4},
        {205, "TD56", 56, 61, 2, 4},
        {206, "TD57", 57, 61, 2, 4},
        {207, "TD58", 58, 61, 2, 4},
        {208, "TD59", 59, 61, 2, 4},
        {209, "TD60", 60, 61, 2, 4},
        {210, "TD61", 61, 61, 2, 4},
        {211, "TD62", 62, 61, 2, 4},
        {212, "TD63", 63, 61, 2, 4},
        {213, "TD64", 64, 61, 2, 4},
        {214, "TD65", 65, 61, 2, 4},
        {215, "TD66", 66, 61, 2, 4},
        {216, "TD67", 67, 61, 2, 4},
        {217, "TD68", 68, 61, 2, 4},
        {218, "TD69", 69, 61, 2, 4},
        {219, "TD70", 70, 61, 2, 4},
        {220, "TD71", 71, 61, 2, 4},
        {221, "TD72", 72, 61, 2, 4},
        {222, "TD73", 73, 61, 2, 4},
        {223, "TD74", 74, 61, 2, 4},
        {224, "TD75", 75, 61, 2, 4},
        {225, "TD76", 76, 61, 2, 4},
        {226, "TD77", 77, 61, 2, 4},
        {227, "TD78", 78, 61, 2, 4},
        {228, "TD79", 79, 61, 2, 4},
        {229, "TCP0", 0, 77, 4, 8},
        {230, "TCP1", 1, 77, 4, 8},
        {231, "TCP2", 2, 77, 4, 8},
        {232, "TCP3", 3, 77, 4, 8},
        {233, "TCP4", 4, 77, 4, 8},
        {234, "TCP5", 5, 77, 4, 8},
        {235, "TCP6", 6, 77, 4, 8},
        {236, "TCP7", 7, 77, 4, 8},
        {237, "TCP8", 8, 77, 4, 8},
        {238, "TCP9", 9, 77, 4, 8},
        {239, "TCP10", 10, 77, 4, 8},
        {240, "TCP11", 11, 77, 4, 8},
        {241, "TCP12", 12, 77, 4, 8},
        {242, "TCP13", 13, 77, 4, 8},
        {243, "TCP14", 14, 77, 4, 8},
        {244, "TCP15", 15, 77, 4, 8},
        {245, "TCP16", 16, 77, 4, 8},
        {246, "TCP17", 17, 77, 4, 8},
        {247, "TCP18", 18, 77, 4, 8},
        {248, "TCP19", 19, 77, 4, 8},
        {249, "TCP20", 20, 77, 4, 8},
        {250, "TCP21", 21, 77, 4, 8},
        {251, "TCP22", 22, 77, 4, 8},
        {252, "TCP23", 23, 77, 4, 8},
        {253, "TCP24", 24, 77, 4, 8},
        {254, "TCP25", 25, 77, 4, 8},
        {255, "TCP26", 26, 77, 4, 8},
        {256, "TCP27", 27, 77, 4, 8},
        {257, "TCP28", 28, 77, 4, 8},
        {258, "TCP29", 29, 77, 4, 8},
        {259, "TCP30", 30, 77, 4, 8},
        {260, "TCP31", 31, 77, 4, 8},
        {261, "TCP32", 32, 77, 4, 8},
        {262, "TCP33", 33, 77, 4, 8},
        {263, "TCP34", 34, 77, 4, 8},
        {264, "TCP35", 35, 77, 4, 8},
        {265, "TCP36", 36, 77, 4, 8},
        {266, "TCP37", 37, 77, 4, 8},
        {267, "TCP38", 38, 77, 4, 8},
        {268, "TCP39", 39, 77, 4, 8},
        {269, "TCP40", 40, 77, 4, 8},
        {270, "TCP41", 41, 77, 4, 8},
        {271, "TCP42", 42, 77, 4, 8},
        {272, "TCP43", 43, 77, 4, 8},
        {273, "TCP44", 44, 77, 4, 8},
        {274, "TCP45", 45, 77, 4, 8},
        {275, "TCP46", 46, 77, 4, 8},
        {276, "TCP47", 47, 77, 4, 8},
        {277, "TCP48", 48, 77, 4, 8},
        {278, "TCP49", 49, 77, 4, 8},
        {279, "TCP50", 50, 77, 4, 8},
        {280, "TCP51", 51, 77, 4, 8},
        {281, "TCP52", 52, 77, 4, 8},
        {282, "TCP53", 53, 77, 4, 8},
        {283, "TCP54", 54, 77, 4, 8},
        {284, "TCP55", 55, 77, 4, 8},
        {285, "TCP56", 56, 77, 4, 8},
        {286, "TCP57", 57, 77, 4, 8},
        {287, "TCP58", 58, 77, 4, 8},
        {288, "TCP59", 59, 77, 4, 8},
        {289, "TCP60", 60, 77, 4, 8},
        {290, "TCP61", 61, 77, 4, 8},
        {291, "TCP62", 62, 77, 4, 8},
        {292, "TCP63", 63, 77, 4, 8},
        {293, "TCP64", 64, 77, 4, 8},
        {294, "TCP65", 65, 77, 4, 8},
        {295, "TCP66", 66, 77, 4, 8},
        {296, "TCP67", 67, 77, 4, 8},
        {297, "TCP68", 68, 77, 4, 8},
        {298, "TCP69", 69, 77, 4, 8},
        {299, "TCP70", 70, 77, 4, 8},
        {300, "TCP71", 71, 77, 4, 8},
        {301, "TCP72", 72, 77, 4, 8},
        {302, "TCP73", 73, 77, 4, 8},
        {303, "TCP74", 74, 77, 4, 8},
        {304, "TCP75", 75, 77, 4, 8},
        {305, "TCP76", 76, 77, 4, 8},
        {306, "TCP77", 77, 77, 4, 8},
        {307, "TCP78", 78, 77, 4, 8},
        {308, "TCP79", 79, 77, 4, 8},
        {309, "DB0", 0, 370, 4, 8},
        {310, "DB1", 1, 370, 4, 8},
        {311, "DB2", 2, 370, 4, 8},
        {312, "DB3", 3, 370, 4, 8},
        {313, "DB4", 4, 370, 4, 8},
        {314, "DB5", 5, 370, 4, 8},
        {315, "DB6", 6, 370, 4, 8},
        {316, "DB7", 7, 370, 4, 8},
        {317, "DB8", 8, 370, 4, 8},
        {318, "DB9", 9, 370, 4, 8},
        {319, "DB10", 10, 370, 4, 8},
        {320, "DB11", 11, 370, 4, 8},
        {321, "DB12", 12, 370, 4, 8},
        {322, "DB13", 13, 370, 4, 8},
        {323, "DB14", 14, 370, 4, 8},
        {324, "DB15", 15, 370, 4, 8},
        {325, "DB16", 16, 370, 4, 8},
        {326, "DB17", 17, 370, 4, 8},
        {327, "DB18", 18, 370, 4, 8},
        {328, "DB19", 19, 370, 4, 8},
        {329, "DB20", 20, 370, 4, 8},
        {330, "DB21", 21, 370, 4, 8},
        {331, "DB22", 22, 370, 4, 8},
        {332, "DB23", 23, 370, 4, 8},
        {333, "DB24", 24, 370, 4, 8},
        {334, "DB25", 25, 370, 4, 8},
        {335, "DB26", 26, 370, 4, 8},
        {336, "DB27", 27, 370, 4, 8},
        {337, "DB28", 28, 370, 4, 8},
        {338, "DB29", 29, 370, 4, 8},
        {339, "DB30", 30, 370, 4, 8},
        {340, "DB31", 31, 370, 4, 8},
        {341, "CB0", 0, 461, 4, 4},
        {342, "CB1", 1, 461, 4, 4},
        {343, "CB2", 2, 461, 4, 4},
        {344, "CB3", 3, 461, 4, 4},
        {345, "CB4", 4, 461, 4, 4},
        {346, "CB5", 5, 461, 4, 4},
        {347, "CB6", 6, 461, 4, 4},
        {348, "CB7", 7, 461, 4, 4},
        {349, "CB8", 8, 461, 4, 4},
        {350, "CB9", 9, 461, 4, 4},
        {351, "CB10", 10, 461, 4, 4},
        {352, "CB11", 11, 461, 4, 4},
        {353, "CB12", 12, 461, 4, 4},
        {354, "CB13", 13, 461, 4, 4},
        {355, "CB14", 14, 461, 4, 4},
        {356, "CB15", 15, 461, 4, 4},
        {357, "CB16", 16, 461, 4, 4},
        {358, "CB17", 17, 461, 4, 4},
        {359, "CB18", 18, 461, 4, 4},
        {360, "CB19", 19, 461, 4, 4},
        {361, "CB20", 20, 461, 4, 4},
        {362, "CB21", 21, 461, 4, 4},
        {363, "CB22", 22, 461, 4, 4},
        {364, "CB23", 23, 461, 4, 4},
        {365, "CB24", 24, 461, 4, 4},
        {366, "CB25", 25, 461, 4, 4},
        {367, "CB26", 26, 461, 4, 4},
        {368, "CB27", 27, 461, 4, 4},
        {369, "CB28", 28, 461, 4, 4},
        {370, "CB29", 29, 461, 4, 4},
        {371, "CB30", 30, 461, 4, 4},
        {372, "CB31", 31, 461, 4, 4},
        {373, "GDS", 0, 123, 4, 4},
        {374, "GRBM", 0, 47, 2, 0},
        {375, "GRBMSE0", 0, 19, 4, 0},
        {376, "GRBMSE1", 1, 19, 4, 0},
        {377, "GRBMSE2", 2, 19, 4, 0},
        {378, "GRBMSE3", 3, 19, 4, 0},
        {379, "RLC", 0, 7, 2, 0},
        {380, "SDMA0", 0, 101, 2, 8},
        {381, "SDMA1", 1, 101, 2, 8},
        {382, "CPG", 0, 82, 2, 4},
        {383, "CPC", 0, 47, 2, 4},
        {384, "ATC", 0, 24, 4, 0},
        {385, "ATCL2", 0, 12, 2, 4},
        {386, "MCVML2", 0, 21, 8, 0},
        {387, "GCEA0", 0, 89, 2, 4},
        {388, "GCEA1", 1, 89, 2, 4},
        {389, "GCEA2", 2, 89, 2, 4},
        {390, "GCEA3", 3, 89, 2, 4},
        {391, "GCEA4", 4, 89, 2, 4},
        {392, "GCEA5", 5, 89, 2, 4},
        {393, "GCEA6", 6, 89, 2, 4},
        {394, "GCEA7", 7, 89, 2, 4},
        {395, "GCEA8", 8, 89, 2, 4},
        {396, "GCEA9", 9, 89, 2, 4},
        {397, "GCEA10", 10, 89, 2, 4},
        {398, "GCEA11", 11, 89, 2, 4},
        {399, "GCEA12", 12, 89, 2, 4},
        {400, "GCEA13", 13, 89, 2, 4},
        {401, "GCEA14", 14, 89, 2, 4},
        {402, "GCEA15", 15, 89, 2, 4},
        {403, "RPB", 0, 63, 4, 0},
        {404, "RMI0", 0, 258, 4, 4},
        {405, "RMI1", 1, 258, 4, 4},
        {406, "RMI2", 2, 258, 4, 4},
        {407, "RMI3", 3, 258, 4, 4},
        {408, "RMI4", 4, 258, 4, 4},
        {409, "RMI5", 5, 258, 4, 4},
        {410, "RMI6", 6, 258, 4, 4},
        {411, "RMI7", 7, 258, 4, 4},
        {412, "RMI8", 8, 258, 4, 4},
        {413, "RMI9", 9, 258, 4, 4},
        {414, "RMI10", 10, 258, 4, 4},
        {415, "RMI11", 11, 258, 4, 4},
        {416, "RMI12", 12, 258, 4, 4},
        {417, "RMI13", 13, 258, 4, 4},
        {418, "RMI14", 14, 258, 4, 4},
        {419, "RMI15", 15, 258, 4, 4},
        {420, "UMC0", 0, 40, 5, 0},
        {421, "UMC1", 1, 40, 5, 0},
        {422, "UMC2", 2, 40, 5, 0},
        {423, "UMC3", 3, 40, 5, 0},
        {424, "UMC4", 4, 40, 5, 0},
        {425, "UMC5", 5, 40, 5, 0},
        {426, "UMC6", 6, 40, 5, 0},
        {427, "UMC7", 7, 40, 5, 0},
        {428, "UMC8", 8, 40, 5, 0},
        {429, "UMC9", 9, 40, 5, 0},
        {430, "UMC10", 10, 40, 5, 0},
        {431, "UMC11", 11, 40, 5, 0},
        {432, "UMC12", 12, 40, 5, 0},
        {433, "UMC13", 13, 40, 5, 0},
        {434, "UMC14", 14, 40, 5, 0},
        {435, "UMC15", 15, 40, 5, 0},
        {436, "UMC16", 16, 40, 5, 0},
        {437, "UMC17", 17, 40, 5, 0},
        {438, "UMC18", 18, 40, 5, 0},
        {439, "UMC19", 19, 40, 5, 0},
        {440, "GE", 0, 315, 12, 16},
        {441, "GL1A0", 0, 36, 4, 4},
        {442, "GL1A1", 1, 36, 4, 4},
        {443, "GL1A2", 2, 36, 4, 4},
        {444, "GL1A3", 3, 36, 4, 4},
        {445, "GL1A4", 4, 36, 4, 4},
        {446, "GL1A5", 5, 36, 4, 4},
        {447, "GL1A6", 6, 36, 4, 4},
        {448, "GL1A7", 7, 36, 4, 4},
        {449, "GL1C0", 0, 64, 4, 4},
        {450, "GL1C1", 1, 64, 4, 4},
        {451, "GL1C2", 2, 64, 4, 4},
        {452, "GL1C3", 3, 64, 4, 4},
        {453, "GL1C4", 4, 64, 4, 4},
        {454, "GL1C5", 5, 64, 4, 4},
        {455, "GL1C6", 6, 64, 4, 4},
        {456, "GL1C7", 7, 64, 4, 4},
        {457, "GL1C8", 8, 64, 4, 4},
        {458, "GL1C9", 9, 64, 4, 4},
        {459, "GL1C10", 10, 64, 4, 4},
        {460, "GL1C11", 11, 64, 4, 4},
        {461, "GL1C12", 12, 64, 4, 4},
        {462, "GL1C13", 13, 64, 4, 4},
        {463, "GL1C14", 14, 64, 4, 4},
        {464, "GL1C15", 15, 64, 4, 4},
        {465, "GL1CG0", 0, 38, 4, 0},
        {466, "GL1CG1", 1, 38, 4, 0},
        {467, "GL1CG2", 2, 38, 4, 0},
        {468, "GL1CG3", 3, 38, 4, 0},
        {469, "GL1CG4", 4, 38, 4, 0},
        {470, "GL1CG5", 5, 38, 4, 0},
        {471, "GL1CG6", 6, 38, 4, 0},
        {472, "GL1CG7", 7, 38, 4, 0},
        {473, "GL1CG8", 8, 38, 4, 0},
        {474, "GL1CG9", 9, 38, 4, 0},
        {475, "GL1CG10", 10, 38, 4, 0},
        {476, "GL1CG11", 11, 38, 4, 0},
        {477, "GL1CG12", 12, 38, 4, 0},
        {478, "GL1CG13", 13, 38, 4, 0},
        {479, "GL1CG14", 14, 38, 4, 0},
        {480, "GL1CG15", 15, 38, 4, 0},
        {481, "GL1CG16", 16, 38, 4, 0},
        {482, "GL1CG17", 17, 38, 4, 0},
        {483, "GL1CG18", 18, 38, 4, 0},
        {484, "GL1CG19", 19, 38, 4, 0},
        {485, "GL1CG20", 20, 38, 4, 0},
        {486, "GL1CG21", 21, 38, 4, 0},
        {487, "GL1CG22", 22, 38, 4, 0},
        {488, "GL1CG23", 23, 38, 4, 0},
        {489, "GL1CG24", 24, 38, 4, 0},
        {490, "GL1CG25", 25, 38, 4, 0},
        {491, "GL1CG26", 26, 38, 4, 0},
        {492, "GL1CG27", 27, 38, 4, 0},
        {493, "GL1CG28", 28, 38, 4, 0},
        {494, "GL1CG29", 29, 38, 4, 0},
        {495, "GL1CG30", 30, 38, 4, 0},
        {496, "GL1CG31", 31, 38, 4, 0},
        {497, "GL2A0", 0, 91, 4, 8},
        {498, "GL2A1", 1, 91, 4, 8},
        {499, "GL2A2", 2, 91, 4, 8},
        {500, "GL2A3", 3, 91, 4, 8},
        {501, "GL2C0", 0, 235, 4, 8},
        {502, "GL2C1", 1, 235, 4, 8},
        {503, "GL2C2", 2, 235, 4, 8},
        {504, "GL2C3", 3, 235, 4, 8},
        {505, "GL2C4", 4, 235, 4, 8},
        {506, "GL2C5", 5, 235, 4, 8},
        {507, "GL2C6", 6, 235, 4, 8},
        {508, "GL2C7", 7, 235, 4, 8},
        {509, "GL2C8", 8, 235, 4, 8},
        {510, "GL2C9", 9, 235, 4, 8},
        {511, "GL2C10", 10, 235, 4, 8},
        {512, "GL2C11", 11, 235, 4, 8},
        {513, "GL2C12", 12, 235, 4, 8},
        {514, "GL2C13", 13, 235, 4, 8},
        {515, "GL2C14", 14, 235, 4, 8},
        {516, "GL2C15", 15, 235, 4, 8},
        {517, "GL2C16", 16, 235, 4, 8},
        {518, "GL2C17", 17, 235, 4, 8},
        {519, "GL2C18", 18, 235, 4, 8},
        {520, "GL2C19", 19, 235, 4, 8},
        {521, "GL2C20", 20, 235, 4, 8},
        {522, "GL2C21", 21, 235, 4, 8},
        {523, "GL2C22", 22, 235, 4, 8},
        {524, "GL2C23", 23, 235, 4, 8},
        {525, "CHA", 0, 45, 4, 4},
        {526, "CHC0", 0, 35, 4, 4},
        {527, "CHC1", 1, 35, 4, 4},
        {528, "CHC2", 2, 35, 4, 4},
        {529, "CHC3", 3, 35, 4, 4},
        {530, "CHCG", 0, 35, 4, 4},
        {531, "GUS", 0, 176, 2, 4},
        {532, "GCR", 0, 94, 2, 4},
        {533, "PA_PH", 0, 960, 8, 16},
        {534, "UTCL10", 0, 15, 2, 0},
        {535, "UTCL11", 1, 15, 2, 0},
        {536, "UTCL12", 2, 15, 2, 0},
        {537, "UTCL13", 3, 15, 2, 0},
        {538, "UTCL14", 4, 15, 2, 0},
        {539, "UTCL15", 5, 15, 2, 0},
        {540, "UTCL16", 6, 15, 2, 0},
        {541, "UTCL17", 7, 15, 2, 0},
        {542, "GPUTime", 0, 6, 2, 0},
    };

    GPA_CounterGroupExposedCounterDesc hw_dx12_exposed_counters_by_group_gfx10[] = {
        {0, 0, {0, 24}},
        {1, 40, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {2, 306, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {3, 572, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {4, 838, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {5, 1104, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {6, 1370, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {7, 1636, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {8, 1902, {8, 14, 21, 54, 55, 56, 57, 61, 62, 73, 74, 105, 109}},
        {9, 2168, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {10, 2720, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {11, 3272, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {12, 3824, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {13, 4376, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {14, 4928, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {15, 5480, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {16, 6032, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {17, 6584, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {18, 7136, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {19, 7688, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {20, 8240, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {21, 8792, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {22, 9344, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {23, 9896, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {24, 10448, {159, 160, 161, 162, 235, 236, 237, 238, 259}},
        {25, 11000, {1, 9, 18, 21, 34, 41, 45, 46, 49, 51, 52, 55, 60, 61, 62, 63, 80, 81, 82, 83, 308, 314, 320, 326}},
        {26, 11329, {1, 9, 18, 21, 34, 41, 45, 46, 49, 51, 52, 55, 60, 61, 62, 63, 80, 81, 82, 83, 308, 314, 320, 326}},
        {27, 11658, {1, 9, 18, 21, 34, 41, 45, 46, 49, 51, 52, 55, 60, 61, 62, 63, 80, 81, 82, 83, 308, 314, 320, 326}},
        {28, 11987, {1, 9, 18, 21, 34, 41, 45, 46, 49, 51, 52, 55, 60, 61, 62, 63, 80, 81, 82, 83, 308, 314, 320, 326}},
        {29, 12316, {4, 5, 8, 31, 55, 57, 59, 60, 61, 64, 69, 70, 82, 117, 285}},
        {30, 12828, {4, 5, 8, 31, 55, 57, 59, 60, 61, 64, 69, 70, 82, 117, 285}},
        {31, 13340, {4, 5, 8, 31, 55, 57, 59, 60, 61, 64, 69, 70, 82, 117, 285}},
        {32, 13852, {4, 5, 8, 31, 55, 57, 59, 60, 61, 64, 69, 70, 82, 117, 285}},
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        {366, 82985, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {367, 83446, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {368, 83907, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {369, 84368, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {370, 84829, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {371, 85290, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {372, 85751, {7, 116, 117, 118, 126, 127, 128, 162, 257, 259}},
        {374, 86335, {0, 2}},
        {387, 86853, {55, 57}},
        {388, 86942, {55, 57}},
        {389, 87031, {55, 57}},
        {390, 87120, {55, 57}},
        {391, 87209, {55, 57}},
        {392, 87298, {55, 57}},
        {393, 87387, {55, 57}},
        {394, 87476, {55, 57}},
        {395, 87565, {55, 57}},
        {396, 87654, {55, 57}},
        {397, 87743, {55, 57}},
        {398, 87832, {55, 57}},
        {399, 87921, {55, 57}},
        {400, 88010, {55, 57}},
        {401, 88099, {55, 57}},
        {402, 88188, {55, 57}},
        {440, 93268, {211, 221, 227, 233, 275}},
        {449, 93871, {14, 18}},
        {450, 93935, {14, 18}},
        {451, 93999, {14, 18}},
        {452, 94063, {14, 18}},
        {453, 94127, {14, 18}},
        {454, 94191, {14, 18}},
        {455, 94255, {14, 18}},
        {456, 94319, {14, 18}},
        {457, 94383, {14, 18}},
        {458, 94447, {14, 18}},
        {459, 94511, {14, 18}},
        {460, 94575, {14, 18}},
        {461, 94639, {14, 18}},
        {462, 94703, {14, 18}},
        {463, 94767, {14, 18}},
        {464, 94831, {14, 18}},
        {501, 96475, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {502, 96710, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {503, 96945, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {504, 97180, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {505, 97415, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {506, 97650, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {507, 97885, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {508, 98120, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {509, 98355, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {510, 98590, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {511, 98825, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {512, 99060, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {513, 99295, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {514, 99530, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {515, 99765, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {516, 100000, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {517, 100235, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {518, 100470, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {519, 100705, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {520, 100940, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {521, 101175, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {522, 101410, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {523, 101645, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {524, 101880, {3, 35, 75, 76, 79, 89, 90, 91, 92}},
        {542, 103685, {0, 1, 2, 3, 4, 5}},
    };

    GPA_PaddedCounterDesc dx12_padded_counter_by_group_gfx10[] = {
    {}
    };

    GPA_SQCounterGroupDesc hw_dx12_sq_groups_gfx10[] = {
        {29, 0, SQ_ALL},
        {30, 1, SQ_ALL},
        {31, 2, SQ_ALL},
        {32, 3, SQ_ALL},
        {33, 0, SQ_ES},
        {34, 1, SQ_ES},
        {35, 2, SQ_ES},
        {36, 3, SQ_ES},
        {37, 0, SQ_GS},
        {38, 1, SQ_GS},
        {39, 2, SQ_GS},
        {40, 3, SQ_GS},
        {41, 0, SQ_VS},
        {42, 1, SQ_VS},
        {43, 2, SQ_VS},
        {44, 3, SQ_VS},
        {45, 0, SQ_PS},
        {46, 1, SQ_PS},
        {47, 2, SQ_PS},
        {48, 3, SQ_PS},
        {49, 0, SQ_LS},
        {50, 1, SQ_LS},
        {51, 2, SQ_LS},
        {52, 3, SQ_LS},
        {53, 0, SQ_HS},
        {54, 1, SQ_HS},
        {55, 2, SQ_HS},
        {56, 3, SQ_HS},
        {57, 0, SQ_CS},
        {58, 1, SQ_CS},
        {59, 2, SQ_CS},
        {60, 3, SQ_CS},
    };


    unsigned int hw_dx12_sq_isolated_groups_gfx10[] = {
        69, // Ta
        70, // Ta
        71, // Ta
        72, // Ta
        73, // Ta
        74, // Ta
        75, // Ta
        76, // Ta
        77, // Ta
        78, // Ta
        79, // Ta
        80, // Ta
        81, // Ta
        82, // Ta
        83, // Ta
        84, // Ta
        85, // Ta
        86, // Ta
        87, // Ta
        88, // Ta
        89, // Ta
        90, // Ta
        91, // Ta
        92, // Ta
        93, // Ta
        94, // Ta
        95, // Ta
        96, // Ta
        97, // Ta
        98, // Ta
        99, // Ta
        100, // Ta
        101, // Ta
        102, // Ta
        103, // Ta
        104, // Ta
        105, // Ta
        106, // Ta
        107, // Ta
        108, // Ta
        109, // Ta
        110, // Ta
        111, // Ta
        112, // Ta
        113, // Ta
        114, // Ta
        115, // Ta
        116, // Ta
        117, // Ta
        118, // Ta
        119, // Ta
        120, // Ta
        121, // Ta
        122, // Ta
        123, // Ta
        124, // Ta
        125, // Ta
        126, // Ta
        127, // Ta
        128, // Ta
        129, // Ta
        130, // Ta
        131, // Ta
        132, // Ta
        133, // Ta
        134, // Ta
        135, // Ta
        136, // Ta
        137, // Ta
        138, // Ta
        139, // Ta
        140, // Ta
        141, // Ta
        142, // Ta
        143, // Ta
        144, // Ta
        145, // Ta
        146, // Ta
        147, // Ta
        148, // Ta
        149, // Td
        150, // Td
        151, // Td
        152, // Td
        153, // Td
        154, // Td
        155, // Td
        156, // Td
        157, // Td
        158, // Td
        159, // Td
        160, // Td
        161, // Td
        162, // Td
        163, // Td
        164, // Td
        165, // Td
        166, // Td
        167, // Td
        168, // Td
        169, // Td
        170, // Td
        171, // Td
        172, // Td
        173, // Td
        174, // Td
        175, // Td
        176, // Td
        177, // Td
        178, // Td
        179, // Td
        180, // Td
        181, // Td
        182, // Td
        183, // Td
        184, // Td
        185, // Td
        186, // Td
        187, // Td
        188, // Td
        189, // Td
        190, // Td
        191, // Td
        192, // Td
        193, // Td
        194, // Td
        195, // Td
        196, // Td
        197, // Td
        198, // Td
        199, // Td
        200, // Td
        201, // Td
        202, // Td
        203, // Td
        204, // Td
        205, // Td
        206, // Td
        207, // Td
        208, // Td
        209, // Td
        210, // Td
        211, // Td
        212, // Td
        213, // Td
        214, // Td
        215, // Td
        216, // Td
        217, // Td
        218, // Td
        219, // Td
        220, // Td
        221, // Td
        222, // Td
        223, // Td
        224, // Td
        225, // Td
        226, // Td
        227, // Td
        228, // Td
        229, // Tcp
        230, // Tcp
        231, // Tcp
        232, // Tcp
        233, // Tcp
        234, // Tcp
        235, // Tcp
        236, // Tcp
        237, // Tcp
        238, // Tcp
        239, // Tcp
        240, // Tcp
        241, // Tcp
        242, // Tcp
        243, // Tcp
        244, // Tcp
        245, // Tcp
        246, // Tcp
        247, // Tcp
        248, // Tcp
        249, // Tcp
        250, // Tcp
        251, // Tcp
        252, // Tcp
        253, // Tcp
        254, // Tcp
        255, // Tcp
        256, // Tcp
        257, // Tcp
        258, // Tcp
        259, // Tcp
        260, // Tcp
        261, // Tcp
        262, // Tcp
        263, // Tcp
        264, // Tcp
        265, // Tcp
        266, // Tcp
        267, // Tcp
        268, // Tcp
        269, // Tcp
        270, // Tcp
        271, // Tcp
        272, // Tcp
        273, // Tcp
        274, // Tcp
        275, // Tcp
        276, // Tcp
        277, // Tcp
        278, // Tcp
        279, // Tcp
        280, // Tcp
        281, // Tcp
        282, // Tcp
        283, // Tcp
        284, // Tcp
        285, // Tcp
        286, // Tcp
        287, // Tcp
        288, // Tcp
        289, // Tcp
        290, // Tcp
        291, // Tcp
        292, // Tcp
        293, // Tcp
        294, // Tcp
        295, // Tcp
        296, // Tcp
        297, // Tcp
        298, // Tcp
        299, // Tcp
        300, // Tcp
        301, // Tcp
        302, // Tcp
        303, // Tcp
        304, // Tcp
        305, // Tcp
        306, // Tcp
        307, // Tcp
        308, // Tcp
    };

    AmdExtGpuBlock hw_dx12_driver_enum_gfx10[] = {
    AmdExtGpuBlock::Cpf,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Pa,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Sc,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Spi,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sq,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Sx,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Ta,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Td,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Tcp,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Db,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Cb,
    AmdExtGpuBlock::Gds,
    AmdExtGpuBlock::Grbm,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::GrbmSe,
    AmdExtGpuBlock::Rlc,
    AmdExtGpuBlock::Dma,
    AmdExtGpuBlock::Dma,
    AmdExtGpuBlock::Cpg,
    AmdExtGpuBlock::Cpc,
    AmdExtGpuBlock::Atc,
    AmdExtGpuBlock::AtcL2,
    AmdExtGpuBlock::McVmL2,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Ea,
    AmdExtGpuBlock::Rpb,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Rmi,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Umcch,
    AmdExtGpuBlock::Ge,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1a,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1c,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl1cg,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2a,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Gl2c,
    AmdExtGpuBlock::Cha,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chc,
    AmdExtGpuBlock::Chcg,
    AmdExtGpuBlock::Gus,
    AmdExtGpuBlock::Gcr,
    AmdExtGpuBlock::Ph,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Utcl1,
    AmdExtGpuBlock::Count,
    };

    const unsigned int hw_dx12_gputimebottomtobottomduration_index_gfx10 = 103685; ///< Index of delta between the previous command reaching bottom of pipe and the current command reaching bottom of pipe, will not include latency of first data to travel through pipeline, best for large data sets. for dx12 for gfx10 family
    const unsigned int hw_dx12_gputimebottomtobottomstart_index_gfx10 = 103686; ///< Index of time of the previous command reaching bottom of pipe for dx12 for gfx10 family
    const unsigned int hw_dx12_gputimebottomtobottomend_index_gfx10 = 103687; ///< Index of time of the current command reaching bottom of pipe for dx12 for gfx10 family
    const unsigned int hw_dx12_gputimetoptobottomduration_index_gfx10 = 103688; ///< Index of execution duration of the current command from top of pipe to bottom of pipe, may include overhead of time in queue for dx12 for gfx10 family
    const unsigned int hw_dx12_gputimetoptobottomstart_index_gfx10 = 103689; ///< Index of time that the current command reaches the top of pipe for dx12 for gfx10 family
    const unsigned int hw_dx12_gputimetoptobottomend_index_gfx10 = 103690; ///< Index of time that the current command reaches the bottom of pipe for dx12 for gfx10 family
    const std::set<unsigned int> hw_dx12_timestamp_block_ids_gfx10 =       {542}; ///< Timestamp block id's for DX12 for gfx10 family
    const std::set<unsigned int> hw_dx12_time_counter_indices_gfx10 =      {103685, 103686, 103687, 103688, 103689, 103690}; ///< Timestamp counter indices for DX12 for gfx10 family
    const unsigned int           hw_dx12_group_count_gfx10                = sizeof(hw_dx12_groups_gfx10) / sizeof(GPA_CounterGroupDesc);
    const unsigned int           hw_dx12_exposed_counters_group_count_gfx10 = 352;
    const unsigned int           dx12_padded_counter_group_count_gfx10 = 0;
    const unsigned int           hw_dx12_sq_group_count_gfx10              = sizeof(hw_dx12_sq_groups_gfx10) / sizeof(GPA_SQCounterGroupDesc);
    const unsigned int           hw_dx12_sq_isolated_group_count_gfx10      = sizeof(hw_dx12_sq_isolated_groups_gfx10) / sizeof(unsigned int);
}; // namespace
